Reduction of Output Impedance of Buck Converter with Genetic Algorithm
Balkan Journal of Electrical and Computer Engineering, cilt.10, sa.3, ss.317-322, 2022 (TRDizin)
- Yayın Türü: Makale / Tam Makale
- Cilt numarası: 10 Sayı: 3
- Basım Tarihi: 2022
- Doi Numarası: 10.17694/bajece.1096188
- Dergi Adı: Balkan Journal of Electrical and Computer Engineering
- Derginin Tarandığı İndeksler: TR DİZİN (ULAKBİM)
- Sayfa Sayıları: ss.317-322
- Açık Arşiv Koleksiyonu: AVESİS Açık Erişim Koleksiyonu
- Maltepe Üniversitesi Adresli: Evet
Özet
This paper introduces a technique to reduce the output impedance in the PWM buck converters with voltage-mode control (VMC) without requiring low Equivalent Series Resistance (ESR) output capacitors. Proposed technique uses the infinity norm ( ) to convert the problem into an optimization problem. Obtained optimization problem is solved with the aid of Genetic Algorithm (GA). The proposed technique is applied to a sample buck converter operating in Continuous Conduction Mode (CCM). Simulink simulation is used to test the suggested method. Simulation results showed a considerable decrease in the low frequency region of output impedance. Such a decrease in output impedance is very desired for low voltage high current loads like computer CPU’s.